"High-Voltage System on Chip
An introduction to High-Voltage
Design Techniques with austriamicrosystems and IBM's CMOS
austriamicrosystems and IBM's
CMOS High-Voltage 0.18µm process is the next generation of
high-performance analog and mixed-signal technologies, ideally
suited for a wide variety of applications such as power
management, motor control, print drivers, DC/DC converters,
switched power supplies, LCD drivers and backlight controllers.
The new 0.18µm High-Voltage CMOS process enables integration of
more digital logic and is therefore the perfect solution for SOC
austriamicrosystems' "Full Service Foundry" philosophy is to
work with its customers to offer an optimal solution for first
time right silicon including extended design support services.
As part of this foundry offering austriamicrosystems is pleased
to announce a complimentary half day High-Voltage Workshop with
the following agenda.
||12:00 pm -
||1:00 pm -
||1:10 pm -
||1:30 pm -
||1:50 pm -
High-Voltage Technology Overview|
- 3:15 pm
||3:15 pm -
High-Voltage Design Flow|
||4:00 pm -
Latch-up & ESD|
||4:30 pm -
Applications (Design on the 0.18µm HV processes)|
||5:00 pm - 5:30 pm
Drawing of the winner|
Regency - Santa Clara (CA)
Santa Clara, CA
Seating for this seminar is limited! To ensure your place please simply click on the
Register link below and
provide your contact details (name, company, and phone number) and the number of seats you require.
COST: Free to attend
Description of the
This seminar will provide an in-depth overview of the 0.18µm High Voltage CMOS technology
including a device description, process and design flow overview
as well as practical case studies for engineers. The seminar and
follow on discussions will be hosted by industry experts from austriamicrosystems and IBM Microelectronics.
The presentation will include a description of the technology process flow and the industry standard LV
CMOS devices, RF analog passives in addition to the suite of high voltage LDMOS, Bipolar and Passive devices.
Of particular interest to designers will be details of current best practices for implementing designs in
analog High-Voltage CMOS from initial product specification to working silicon. This depends on understanding the details of the RF Analog PDK and associated tools. Special consideration for ESD and
Latchup will assure a 1st time right design.
The aim of this training course is to enable designers of integrated circuits to understand the
design methodology of complex mixed mode products and gain insight into the design flow as provided by the
austriamicrosystems and IBM PDKs.For more information please contact Ms. Jolyne Wagner at 1-919-676-5292 or
Description of the
0.18µm High-Voltage CMOS Process:
The new 0.18µm High-Voltage CMOS technology is a joint development between IBM and austriamicrosystems
where the RF CMOS base experience and devices from IBM
are merged with austriamicrosystems' HV CMOS device and HV
design expertise. The resulting process provides a comprehensive portfolio of 20V and 50V devices across a
choice of 3 gate oxide options.
Only three masks are added to the standard CMOS7RF (IBM's 0.18µm RFCMOS technology). The resulting HV LDMOS device
performance compares well with that obtained from BCD with the cost effectiveness of CMOS. Therefore, this technology
provides an attractive approach for High-Voltage designers.
For further information please refer to
- Very low "on resistance" HV devices over a range of voltages for improved performance and smaller die-sizes
- Fully isolated and substrate based low voltage devices which match the base CMOS devices
- Fully modular and design compatible to the IBM 0.18µm CMOS base process
- Industry leading Process Design Kit available with fully characterized models
- 3 - 7 metal levels, including a thick last metal level for power
- Real SOC (System-on-Chip) solutions possible (120 kGates per sqmm)
|Win an iPod
Among all participants of the High-Voltage Technology Seminar a brand new iPod Touch
our booth # 310 at the GSA Supplier Expo and